BULLETIN of the

POLISH ACADEMY of SCIENCES

TECHNICAL SCIENCES

 BULLETIN of the POLISH ACADEMY of SCIENCES: TECHNICAL SCIENCES
Volume 54, Issue 4, December 2006

Civil Engineering and Electronics
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pp 443 - 448

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Transresistance CMOS neuron for adaptive neural networks implemented in hardware

R. WOJTYNA and T. TALASKA
 
A simple analog circuit is presented which can play a neuron role in static-model-based neural networks implemented in the form of an integrated circuit. Operating in a transresistance mode it is suited to cooperate with transconductance synapses. As a result, its input signal is a current which is a sum of currents coming from the synapses. Summation of the currents is realized in a node at the neuron input. The circuit has two outputs and provides a step function signal at one output and a linear function one at the other. Activation threshold of the step output can be conveniently controlled by means of a voltage. Having two outputs, the neuron is attractive to be used in networks taking advantage of fuzzy logic. It is built of only five MOS transistors, can operate with very low supply voltages, consumes a very low power when processing the input signals, and no power in the absence of input signals. Simulation as well as experimental results are shown to be in a good agreement with theoretical predictions. The presented results concern a 0.35 1m CMOS process and a prototype fabricated in the framework of Europractice.
  
Key words: 

neural networks, learning on silicon, hardware intelligence, CMOS analog circuits, low-power electronics
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